A Time Scaling Theory for Multi-Layer Electronic Systems functioned as both an empirical observation and helped establish an industry compact upon which the entire computing stack was built. That industry compact no longer holds. Beyond the 7 nm node, geometric scaling no longer delivers its historical dividends. Lithography tooling is approaching the physical limits of patterning, EUV depreciation dominates wafer cost, and the per-transistor price curve has flattened — and in some cases reversed. For organ ...

作者简介 何庭波领导华为半导体业务。她领导的团队在2020年至2026年间设计并量产了381款芯片，涵盖移动、人工智能、汽车和基础设施市场，并且是τ缩放 方法以及本文中提到的LogicFolding、UnifiedBus和Hi-ONE技术的源头。 如果您希望可以时常见面，欢迎标星收藏哦~ 在今天于上海举行的一场行业大会上，华为公司董事、半导体业务部总裁何庭波在题为《半导体新路径探索与实践》的主旨演讲中，正式发表"韬 （τ）定律"。这是中国在全球半导体领域首次提出指导产业发展的新原则。基于该定律，华为过去六年已成功设计并量产了381款芯片。今年秋 季，华为将发布新的麒麟手机芯片，完整采用逻辑折叠技术，大幅提升相关性能。 随后，华为发布了一篇署名为何庭波的论文，详细介绍了这些新技术和进展。 摘要 六十年来，摩尔定律的几何缩放推动了半导体技术的进步。然而，这一行业共识已不再适用：纯粹尺寸缩小带来的收益已趋于平缓，尖端芯片的设 计预算超过十亿美元，而最先进节点的晶体管成本也不再下降。本文提出了一种新的缩放原则——τ缩放。该原则以时间本身而非晶体管面积作为衡 量进步的主要指标，并采用单一的特征时间常数τ作为统一的优化目 ...

Tingbo He, president of Huawei semiconductor, presents at an industry conference in Shanghai on May 25, 2026. Huawei said that by 2031, its new chip technology could deliver capabilities equivalent to 1.4-nanometer process technology — while global chip leader TSMC has begun volume production of 2-nanometer chips. SHANGHAI — Chinese tech giant Huawei on Monday touted a new approach to developing advanced semiconductors despite U.S. sanctions, as Nvidia struggles to sell its high-end chips in China. Nanomete ...